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Categories: graphene IBM Intel Motorola

Most of the time, when we talk about the potential impact of next-generation technologies on future computers, we’re talking about transistor performance. This makes sense — transistor scaling is what Moore’s law covers, and improving transistor density and design is what drove the “better, faster, cheaper,” mantra for nearly 40 years. But transistors aren’t the only area of CPU design that could benefit from dramatic improvements to underlying technology — and a team of researchers at Stanford believes it can address another critical problem that’s holding modern chips back, by building connective structures via copper and #graphene combined rather than just copper. Every modern CPU is wired together via an extensive network of copper wires, dubbed “interconnects.” These tiny copper wires carry data across the processor and throughout the entire SoC. #IBM and #Motorola introduced copper interconnects in 1997, followed by Intel in 2000. In 2000, #Intel processors contained roughly 1km of copper interconnects per square centimeter. In 2017, 14nm chips contain roughly 10km of wiring in the same space

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